发明名称 METHOD FOR DEBUGGING PCB FIXING 68000 CPU USING ISA BUS
摘要 PURPOSE: A method for debugging a PCB fixing 68000 CPU using an ISA bus is provided to test operation of circuit for the PCB by executing an operation testing program under MS-DOS environment after connecting ISA bus of CPU card, or a main-board having 86-series CPU. CONSTITUTION: An input/output signal, or read/write operation of memory is checked by using the ISA bus. A relay board relays the ISA bus signal of the main board and signal of the PCB debug board. A circuit of the relay board comprises address/data bus, PLD1, PLD2, ISA bus control signal. The PLD1 is a signal generation circuit of ISA bus address decoder and chip select signal. The PLD2 is an output circuit of signal for address decoder of PCB debugs board. The PLD1 and PLD2 are produced using the PLD(Programmable Logic Device). The ISA bus control signal is output when the ISA bus decoder condition is satisfied.
申请公布号 KR20040000070(A) 申请公布日期 2004.01.03
申请号 KR20020035193 申请日期 2002.06.24
申请人 WACOM KOREA 发明人 HIRAYAMA, KATSUEI
分类号 G06F11/28;(IPC1-7):G06F11/28 主分类号 G06F11/28
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