发明名称 METHOD FOR FORMING SEMICONDUCTOR GATE LINE
摘要 PURPOSE: A method for forming a semiconductor gate line is provided to simplify a fabricating process by omitting a sidewall spacer process, and to easily control residual oxide due to high etch selectivity of polysilicon and a gate oxide by performing only a gate etch process. CONSTITUTION: After polysilicon is deposited on a silicon substrate(20), a gate pattern(30) is formed. The polysilicon is laterally etched to the half thickness of the polysilicon. The polysilicon is etched by using the gate pattern as a mask, but the etch process stops before the silicon substrate. The gate pattern is eliminated to form a large gate region enough to cover an N and P channel lightly-doped-drain(LDD) ion implantation regions. A source/drain ion implantation process is performed to form a source/drain region. A blank gate etch process is performed to form a gate pattern having the same size as a real gate region. An LDD ion implantation process is performed to form an LDD region so that a final gate line is formed.
申请公布号 KR20040025806(A) 申请公布日期 2004.03.26
申请号 KR20020056407 申请日期 2002.09.17
申请人 ANAM SEMICONDUCTOR., LTD. 发明人 PARK, TAE HUI
分类号 H01L21/336;(IPC1-7):H01L21/336 主分类号 H01L21/336
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