发明名称 PACKAGING SUBSTRATE AND PACKAGING STRUCTURE OF SEMICONDUCTOR ELEMENT
摘要 <p><P>PROBLEM TO BE SOLVED: To manufacture a packaging substrate at a low cost for mounting a semiconductor element wherein the spacing of electrode terminals is partially narrower than the reference pitch. <P>SOLUTION: In the packaging substrate 14 of a semiconductor element, a pad 16 jointed to the electrode terminal 12 of a semiconductor element 10 by flip chip connection is provided on a substrate. The pad 16 for joining the electrode terminal 12 of the electrode terminals of the semiconductor element 10, which is arranged with a reference pitch of the semiconductor element 10, is arranged with the same spacing as the reference pitch. Pads 16a, 16b joining electrode terminals 12a, 12b arranged at an arrangement spacing which is narrower than the reference pitch are arranged at a wider spacing than the arrangement spacing of the electrode terminals 12a, 12b, by displacing the central position of the pads 16a, 16b to the central position of the electrode terminals 12a, 12b. <P>COPYRIGHT: (C)2004,JPO</p>
申请公布号 JP2004165476(A) 申请公布日期 2004.06.10
申请号 JP20020330580 申请日期 2002.11.14
申请人 SHINKO ELECTRIC IND CO LTD 发明人 OZAWA TAKASHI
分类号 H01L21/60;(IPC1-7):H01L21/60 主分类号 H01L21/60
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