发明名称 Sequential cell data scrambling system for e.g. microcontroller, has scrambling unit receiving input from data bus to produce output transmitted to cell, and descrambling unit producing output identical to input of scrambling unit
摘要 <p>The system has a scrambling unit coupled with a sequential cell and with a data bus (116). The scrambling unit receives an input from the data bus and produces an output that is transmitted to the cell. A descrambling unit (310) is coupled with the cell and receives an input from the cell to produce an output that is identical to the input of scrambling unit. Independent claims are also included for the following: (a) a microcontroller having a sequential cell (b) a microcomputer having a register (c) a process of scrambling data of a sequential cell in an integrated circuit.</p>
申请公布号 FR2857535(A1) 申请公布日期 2005.01.14
申请号 FR20030008405 申请日期 2003.07.09
申请人 ATMEL CORPORATION 发明人 VERGNES ALAIN
分类号 G06F21/71;G06F21/85;G07F7/10;H04L9/18;(IPC1-7):H04L9/18;G06K19/073 主分类号 G06F21/71
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