| 发明名称 |
Method of fabricating semiconductors |
| 摘要 |
A method of manufacturing a semiconductor includes applying a planarization material to a substrate and forming an opening in the planarization material. The opening is filled with polysilicon. A plurality of etching modulation sequences are applied to the substrate, each of the etching modulation sequences including: applying a first etching process to the substrate, wherein the first etching process is more selective to polysilicon than the planarization material; and applying a second etching process to the substrate, wherein the second etching process is more selective to the planarization material than the polysilicon. |
| 申请公布号 |
US9490143(B1) |
申请公布日期 |
2016.11.08 |
| 申请号 |
US201514952693 |
申请日期 |
2015.11.25 |
| 申请人 |
TEXAS INSTRUMENTS INCORPORATED |
发明人 |
Farber David Gerald;Jiang Ping;Kirkpatrick Brian K.;Grider, III Douglas T. |
| 分类号 |
H01L21/3205;H01L21/321;H01L21/3213;H01L21/02 |
主分类号 |
H01L21/3205 |
| 代理机构 |
|
代理人 |
Garner Jacqueline J.;Cimino Frank D. |
| 主权项 |
1. A method of making a semiconductor, the method comprising:
applying a planarization material to a substrate; forming an opening in the planarization material; filling the opening with polysilicon; and applying a plurality of etching modulation sequences to the substrate, each of the etching modulation sequences comprising:
applying a first etching process to the substrate, wherein the first etching process is more selective to polysilicon than the planarization material; andapplying a second etching process to the substrate, wherein the second etching process is more selective to the planarization material than the polysilicon. |
| 地址 |
Dallas TX US |
