发明名称 SYSTEM IN PACKAGE AND ITS VERIFICATION METHOD
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a system in package and its verification method which is capable of function verification of chips mounted without providing any special test circuit and effectively utilizing the chip in the package. <P>SOLUTION: In a mounting substrate (PWB) 11 of the system in a package SiP1, regular operation circuits 12, 13 where regular circuits are constituted, and a programable logic circuit 14 connected with a bonding wire 18 are implemented. The programable logic circuit 14 is a function verification circuit executing function verification of the semiconductor chips 12, 13 in a test mode for implementation test after implementation. After the implementation test, the logic circuit is rewritten to a desired function circuit to be a regular operation circuit. <P>COPYRIGHT: (C)2006,JPO&NCIPI</p>
申请公布号 JP2005283205(A) 申请公布日期 2005.10.13
申请号 JP20040094460 申请日期 2004.03.29
申请人 NEC ELECTRONICS CORP 发明人 AKAHA KENJI
分类号 G01R31/28;H01L21/822;H01L27/04;(IPC1-7):G01R31/28 主分类号 G01R31/28
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