发明名称 PROGRAMMABLE LOGIC CIRCUIT APPARATUS, INFORMATION PROCESSING SYSTEM, RECONSTRUCTION METHOD OF CIRCUIT TO PROGRAMMABLE LOGIC CIRCUIT APPARATUS, AND COMPRESSION METHOD OF CIRCUIT INFORMATION FOR PROGRAMMABLE LOGIC CIRCUIT APPARATUS
摘要 PROBLEM TO BE SOLVED: To provide a technology equivalent to a multi-context technology without using a configuration memory to store a plurality of circuit information which incurs the deterioration of circuit performance, an increase in power consumption, an increase in the number of manufacturing processes, an increase in manufacturing cost or the like. SOLUTION: A programmable logic circuit apparatus is provided with a circuit information storage means 102 separate from a configuration memory, and a circuit information editing means 103 for generating the circuit information of a designated circuit by using the circuit information stored in the storage means 102. A plurality of pieces of the circuit information are stored in a compressed state in the storage means 102. When the designated circuit information of the circuit to be reconstituted is inputted to a programmable logic circuit portion 104, the circuit is reconstructed by reading necessary circuit information from the storage means 102 in the editing means 103 by depressing compression by the generation of the circuit information designated by designated information, and by transferring the generated circuit information to the configuration memory 106. COPYRIGHT: (C)2006,JPO&NCIPI
申请公布号 JP2005323399(A) 申请公布日期 2005.11.17
申请号 JP20050201056 申请日期 2005.07.11
申请人 FUJI XEROX CO LTD 发明人 NISHIHARA YOSHIO
分类号 H03K19/173;(IPC1-7):H03K19/173 主分类号 H03K19/173
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