| 发明名称 |
Amplifier |
| 摘要 |
The present invention is directed to a radiation-hardened by design quad amplifier in a commercial 0.25 μm CMOS process; a 500 had total ionization dose (TID) (which degrades parts over time), and single event latchup immunity (SEL) which is greater than the linear energy transfer (LET) 120 MeV-sq. cm/mg; a single 3.3 V (range 3.0-3.6 V) power supply Vdd or dual power supply +/−1.65 V; four (4) channels of analog inputs; enhanced low-dose rate sensitivity (ELDRS) immunity; output rail-to-rail input/output (I/O) OPAMP which can drive resistive loads down to 1 kOhm; an active high enable pin en; a bias pin that can be used to adjust the OPAMP quiescent current; and a compact hermetic 16-lead ceramic small outline integrated circuit (SOIC) package. |
| 申请公布号 |
US2017063317(A1) |
申请公布日期 |
2017.03.02 |
| 申请号 |
US201514843505 |
申请日期 |
2015.09.02 |
| 申请人 |
U.S.A. as represented by the Administrator of the National Aeronautics and Space Administration |
发明人 |
SUAREZ GEORGE;DUMONTHIER JEFFREY J. |
| 分类号 |
H03F3/45 |
主分类号 |
H03F3/45 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An amplifier comprising:
a 0.25 μm complementary metal-oxide semiconductor (CMOS); a 500 Krad total ionization dose and single event latchup immunity which is greater than the linear energy transfer (LET) 120 MeV-sq. cm/mg; four channels of analog inputs; enhanced low-dose rate sensitivity immunity; a bias pin used to adjust quiescent current in a range of 1-35 μA; and an active high enable pin en. |
| 地址 |
Washington DC US |
