发明名称 Memory equipped with information retrieval function, method for using same, device, and information processing method
摘要 CPUs are not effective for search processing for information on a memory. Content-addressable memories (CAMs) are effective for information searches, but it is difficult to build a large-capacity memory usable for big data using the CAMs. A large-capacity memory may be turned into an active memory having an information search capability comparable to that of a content-addressable memory (CAM) by incorporating an extremely small, single-bit-based parallel logical operation unit into a common memory. With this memory, a super fast in-memory database capable of fully parallel searches may be realized.
申请公布号 US9627065(B2) 申请公布日期 2017.04.18
申请号 US201415107565 申请日期 2014.12.18
申请人 Inoue Katsumi 发明人 Inoue Katsumi
分类号 G11C15/04;G06F17/30;G11C15/00;G10L15/28 主分类号 G11C15/04
代理机构 代理人 Takeshita Konomi
主权项 1. A data processing device for performing search operations on field data of 2 or more records that constitute a database and outputting results of the search operations, the data processing device comprising a memory, a single-bit logical operation circuit connected to the memory and an output circuit for outputting a logical operation result obtained by the single-bit logical operation circuit, wherein, in the memory, data of a specific field of each record is coded by bit data (“0” or/and “1”) having a bit width corresponding to a data length of the field, and is stored at respective word addresses, wherein the number of the word addresses corresponds to the bit width, wherein, when the single-bit logical operation circuit performs, as an operation to data of a specific field of each record, an operation of an operation condition that specifies a condition including a detection of a record where field data matches a specific operation condition value or a detection of a record in which field data falls in a specific range of operation condition values, the single-bit logical operation circuit reads bit values stored at a same word address for all records in parallel, performs single-bit logical operations in parallel at all records according to an operation condition, and outputs single-bit logical operation results to the operation result output circuit as bit values of all records, and wherein the operation result output circuit comprises a unit for identifying a record whose bit value of the operation result is 1 and outputting the identified result as an operation processing result.
地址 Chiba JP