TECHNIQUE TO SHARE INFORMATION AMONG DIFFERENT CACHE COHERENCY DOMAINS

摘要

A technique to enable information sharing among agents within different cache coherency domains. In one embodiment, a graphics device may use one or more caches used by one or more processing cores to store or read information, which may be accessed by one or more processing cores in a manner that does not affect programming and coherency rules pertaining to the graphics device.

主权项

1. A system comprising:
a plurality of cores having a first processing architecture; a memory interface circuit to communicatively couple one or more of the cores to a system memory; a first level cache, a second level cache, and a third level cache configured in a cache hierarchy within a cache coherency domain usable by at least one of the cores, at least one cache of the cache hierarchy to store information to be shared with one or more functional circuits having a second processing architecture; a communication interconnect circuit to couple one or more of the plurality of cores to the one or more functional circuits over at least one bus; and cache coherence circuitry to maintain coherence between at least one cache within the cache coherency domain of the at least one core and at least one cache of the one or more functional circuits; wherein the cache coherence circuitry is to transfer information provided by at least one core within the cache hierarchy to make the information accessible to the at least one cache of the one or more of the functional circuits, and wherein the cache coherence circuitry is to transfer information generated or modified by one or more of the functional circuits to make the information accessible to at least one cache of the cache hierarchy.