发明名称 Segmentation of blocks for faster bit line settling/recovery in non-volatile memory devices
摘要 In non-volatile memory circuits, the amount of time needed for bit lines to settle can vary significantly depending on the location of the blocks selected. For example, in a sensing operation, the amount of time for bit lines to settle when being pre-charged by sense amplifiers will be shorter for blocks near the sense amps than for far side blocks. These variations can be particularly acute in high density memory structures, such as in 3D NAND memory, such as that of the BiCS variety. Rather than use the same timing for all blocks, the blocks can be segmented into groups based on their proximity to the sense amps. When performing a sensing operation, the timing can be adjusted based on the block group to which a selected page of memory cells belongs.
申请公布号 US9633742(B2) 申请公布日期 2017.04.25
申请号 US201414328018 申请日期 2014.07.10
申请人 SanDisk Technologies LLC 发明人 Desai Amul Dhirajbhai;Nguyen Hao;Lee Seungpil;Mui Man
分类号 G11C16/32;G11C16/26;G11C16/34;G11C7/08;G11C11/56;G11C16/04;H01L27/115;H01L27/1157;H01L27/11582;G11C16/16 主分类号 G11C16/32
代理机构 Stoel Rives LLP 代理人 Stoel Rives LLP
主权项 1. A non-volatile memory circuit, comprising: an array of non-volatile memory cells formed as a plurality of blocks; a plurality of bit lines spanning the plurality of blocks to which the memory cells of the blocks are connected; and sensing circuitry connected to the array, including a plurality of sense amp circuits connected to the bit lines, wherein the sensing circuitry varies a time allotted for biasing the array for a sensing operation of selected memory cells based upon a physical distance along the bit lines from the sense amp circuits to the block of the selected memory cells, wherein: each of the blocks belongs to one of a plurality of block groups,each of the block groups contains one or more adjacent blocks of the array,the blocks of a group use a shared time allotment for biasing the array for the sensing operations of selected memory cells belonging thereto,the different block groups use different time allotments for biasing the array for the sensing operations of selected memory cells belonging thereto, andblock groups that are physically closer to corresponding ones of the sense amp circuits along the bit lines than others of the block groups are biased for shorter time allotments than the others of the block groups to reduce total power expended during the biasing.
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