发明名称 |
Method, computer program product, and system for a multi-input bitwise logical operation |
摘要 |
A method, computer program product, and system are provided for multi-input bitwise logical operations. The method includes the steps of receiving a multi-input bitwise logical operation instruction that specifies two or more input operands and a function operand, where a first input operand of the two or more input operands comprises a number of bits, each bit having a corresponding bit in each of the additional input operands in the two or more input operands. The function operand is written to a lookup table. Then, the lookup table is accessed for each set of corresponding input operand bits in the two or more input operands to generate an output for the multi-input bitwise logical operation instruction. |
申请公布号 |
US9471310(B2) |
申请公布日期 |
2016.10.18 |
申请号 |
US201213685611 |
申请日期 |
2012.11.26 |
申请人 |
NVIDIA Corporation |
发明人 |
Panteleev Alexey Yuryevich |
分类号 |
G06F9/30;G06F9/38 |
主分类号 |
G06F9/30 |
代理机构 |
Zilka-Kotab, PC |
代理人 |
Zilka-Kotab, PC |
主权项 |
1. A method, comprising:
receiving, by a parallel processor, a multi-input bitwise logical operation instruction that specifies two or more input operands and a function operand, wherein a first input operand of the two or more input operands comprises a number of bits, each bit having a corresponding bit in each of the additional input operands in the two or more input operands, wherein a predicate operation controls whether individual threads in a group of threads execute a subsequent instruction without executing the multi-input bitwise logical operation instruction; writing the function operand to a lookup table within the parallel processor; and accessing the lookup table for each set of corresponding input operand bits in the two or more input operands to generate an output for the multi-input bitwise logical operation instruction. |
地址 |
Santa Clara CA US |