发明名称
摘要 1406670 Printed circuits WESTINGHOUSE ELECTRIC CORP 13 Sept 1972 [15 Oct 1971] 42424/72 Heading H1R A printed circuit laminate for integrated circuit chips comprises a ceramic substrate 2 of, e.g. magnesia, beryllia, or alumina admixed with oxides of silicon, calcium, or magnesium; an adherent layer 3 of Mo-Mn alloy and an overlying gold layer 4; portions of the layers having been etched out to give the circuit pattern. Fingers 7 extend from the circuit pattern 8 to substrate edges 9, 10 for connection to other circuitry and a similar ceramic frame 11 is sealed over the fingers; within which integrated circuit chips 12 are mounted on the laminate and connected to the circuit pattern by wires or beam leads 13; a cover 14 being sealed to the top of frame 11. In fabrication a Mo-Mn paste is silk screened on the substrate so that fingers extend from the centre to e.g. two opposed edges and the frame is applied over a layer of glaze with its top coated with Mo-Mn. The whole is fired in a reducing atmosphere, and the Mo-Mn areas are electroplated with gold. Thereafter a photoresist film is applied to the gold within the frame, exposed through mask to U.V. light, developed, and washed, after which the uncovered portions of gold are etched out with a warm aqueous mixture of I, KI, and CH 3 COOK. The remaining gold masks the Mo-Mn alloy for etching in warm H 2 SO 4 +HNO 3 +H 2 O, after which the IC chips are mounted on the substrate with the frame and interconnected to the circuit pattern; and a ceramic or metal cover is soldered or otherwise sealed to the frame. Alternatively the photoresist may be applied direct to the Mo-Mn, exposed, and electroplated with Au on the uncovered areas which, after removal of photoresist, masks the Mo-Mn for etching. Reference has been directed by the Comptroller to Specification 1,289,075.
申请公布号 JPS4848077(A) 申请公布日期 1973.07.07
申请号 JP19720102002 申请日期 1972.10.13
申请人 发明人
分类号 H05K3/12;H01L23/15;H01L23/52;H05K1/03;H05K1/09;H05K3/24;(IPC1-7):H01B5/14 主分类号 H05K3/12
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