发明名称 Integrated circuit package substrate with openings surrounding a conductive via
摘要 Integrated circuit packages with openings surrounding a conductive via on a substrate layer are disclosed. An integrated circuit package may include a substrate layer with upper and lower surfaces. A conductive via may extend between the upper and lower surfaces of the substrate layer. The integrated circuit package further includes multiple openings in the substrate layer that may be distributed evenly in the substrate layer surrounding the conductive via. The multiple openings reduce signal insertion loss of the conductive via.
申请公布号 US9478491(B1) 申请公布日期 2016.10.25
申请号 US201414170294 申请日期 2014.01.31
申请人 Altera Corporation 发明人 Zhang Jianmin;Lee Myung June
分类号 H01L23/48;H05K1/18;H01L23/522;H01L21/768 主分类号 H01L23/48
代理机构 代理人
主权项 1. Apparatus, comprising: a substrate layer having upper and lower surfaces; a conductive via that extends from the upper surface to the lower surface of the substrate layer; and at least three metal-free openings in the substrate layer that surround the conductive via.
地址 San Jose CA US