| 摘要 |
Three-dimensional memory structures that are configured to use area efficiently, and methods for providing three-dimensional memory structures that use area efficiently are provided. The vertical memory structure can include a number of bit line bits that is greater than a number of word line bits. In addition, the ratio of bit line bits to word line bits can be equal to a ratio of a first side a memory cell included in a memory array of the memory structure to a dimension of a second side of the memory cell. |
