Apparatus and method for combining multiple charge pumps in phase locked loops

摘要

A frequency synthesizer includes circuitry configured to generate two or more feedback clocks based on the oscillation signals output from a voltage-controlled oscillator. The circuitry also modulates the feedback clocks based on fractional offsets from a reference clock frequency for input into two or more phase and frequency detectors. Multiple charge pump circuits receive inputs from these phase and frequency detectors. The current from these charge pumps is summed and input to a low pass filter. The output of the filter represents an average of the time difference between the reference clock and the multiple feedback clocks.

主权项

1. A frequency synthesizer comprising:
circuitry configured to
generate two or more feedback clocks based on oscillation signals output from a voltage-controlled oscillator;modulate the two or more feedback clocks based on fractional offsets from a reference clock frequency for input into a plurality of phase and frequency detectors (PFDs) driving a plurality of charge pumps; andselect an output from one of the plurality of PFDs corresponding to an early feedback clock input that leads a reference clock or a late feedback clock input that lags the reference clock to drive each of the plurality of charge pumps,wherein the circuitry is further configured to randomize selections of the plurality of charge pumps associated with the early feedback clock and late feedback clock.