| 发明名称 |
REFERENCELESS AND MASTERLESS GLOBAL CLOCK GENERATOR WITH A PHASE ROTATOR-BASED PARALLEL CLOCK DATA RECOVERY |
| 摘要 |
The CDR (Clock Data Recovery) device may include at least one or more CDR channels configured to receive input data stream; and a global clock generator configured to provide a frequency locked clock to each of the at least one or more CDR channels, wherein each of the at least one or more CDR channels creates a reference clock signal for the global clock generator. |
| 申请公布号 |
US2016336942(A1) |
申请公布日期 |
2016.11.17 |
| 申请号 |
US201415110912 |
申请日期 |
2014.02.05 |
| 申请人 |
Korea Advanced Institute of Science and Technology |
发明人 |
BAE Hyeon Min;LEE Joon-Yeong |
| 分类号 |
H03L7/08;H03L7/18;H04L7/04;H03L7/07 |
主分类号 |
H03L7/08 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. The CDR (Clock Data Recovery) device, comprising:
at least one or more CDR channels configured to receive input data stream; and a global clock generator configured to provide a frequency locked clock to each of the at least one or more CDR channels, wherein each of the at least one or more CDR channels creates a reference clock signal for the global clock generator. |
| 地址 |
Daejeon KR |
