发明名称 PROTECTIVE CIRCUIT FOR FIELD EFFECT TRANSISTOR AMPLIFIER
摘要 <p>1475389 Transistor amplifying circuits SONY CORP 3 Oct 1974 [5 Oet 1973] 42982/74 Heading H3T In an amplifier using field-effect transistors, means are provided for detecting overload so that the input signal is then applied directly to the output load, without variation of the bias being caused thereby. The embodiment is a parallel-push-pull amplifier using FETs (Figs. 1-5, not shown) with triode characteristics arranged as a class B complementary output stage with load Z L and driven via a biasing network 12 from a pre-amplifier stage 11. Network 12 comprises a first network 12a for biasing transistors F1b, F2b and a corresponding second network 12b for biasing transistors F1a, F2a. Biasing network 12a comprises a bias potentiometer form by resistors R3a, R4a and diode D1 which determines the bias on and current in a transistor Q1a. The collector potential of this is determined by the ratio between resistors R1a, R2a and forms the bias for emitter-follower Q2a which biases the FETs F1b, F2b; the signal input from terminal t 2 is applied to the base of transistor Q2a via capacitor C1a. The biasing network 12b for the FETs F1a F2a is similar, but resistor R4b is made variable so that the standing bias is adjustable. Resistor 25 and capacitor 26 provide overall negative feedback. This biasing arrangement is disclosed in Specification 1,474,744. Overload protection circuit.-The currents in FETs F1a, F2a produce corresponding voltages across resistors R9a, R10a which charge capacitor C3a via diodes D4a, D4a<SP>1</SP> respectively: if the load Z L is of normal value, however a balancing voltage is fed to the capacitor via resistor R7a and diode D3a, and the effective charge is zero. If however, the load Z L is excessively small, e.g. a short-circuit occurs, the balancing voltage is not produced, capacitor C3a charges up, and transistor Q4a is biased conductive the charging being responsive to both the current in and voltage across the load. Transistor Q3a is thereby biased conductive and connects the input terminal t 2 to the output via diode D2a which prevents Zener action in transistor Q3a; the drive to the output FETs is thereby removed. A second protective circuit 14b corresponding to the first circuit 14a operates on negative-going signals.</p>
申请公布号 CA1012214(A) 申请公布日期 1977.06.14
申请号 CA19740210784 申请日期 1974.10.04
申请人 SONY CORPORATION 发明人 TSURUSHIMA, KATSUAKI
分类号 H03F1/42;H03F1/52;H03F3/30 主分类号 H03F1/42
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