Pulse generation circuit and semiconductor device

摘要

Two gate drivers each comprising a shift register and a demultiplexer including single conductivity type transistors are provided on left and right sides of a pixel portion. Gate lines are alternately connected to the left-side and right-side gate drivers in every M rows. The shift register includes k first unit circuits connected in cascade. The demultiplexer includes k second unit circuits to each of which a signal is input from the first unit circuit and to each of which M gate lines are connected. The second unit circuit selects one or more wirings which output an input signal from the first unit circuit among M gate lines, and outputs the signal from the first unit circuit to the selected wiring(s). Since gate signals can be output from an output of a one-stage shift register to the M gate lines, the width of the shift register can be narrowed.

主权项

1. A pulse generation circuit comprising:
a first unit circuit comprising a first circuit and a second circuit, and a third circuit, the first to third circuits being connected in cascade; and a second unit circuit comprising a fourth circuit an input of which is connected to the second circuit and an output of which is connected to M (M is an integer of 2 or more) wirings, wherein the second circuit comprises a first output terminal, a second output terminal, a third output terminal, and a fourth output terminal, wherein the second circuit is configured to output a first signal from the first output terminal to the first circuit, wherein the second circuit is configured to output a second signal from the second output terminal to the third circuit, wherein the second circuit is configured to output a third signal from the third output terminal to the fourth circuit, and wherein the second circuit is configured to output a fourth signal from the fourth output terminal to the fourth circuit.