Method for concurrent system management and error detection and correction requests in integrated circuits through location aware avoidance logic

摘要

A method of incorporating active error correction inside a memory device is used, whereby memory scrub cycles can be completely hidden from an end user. The method simplifies the design of the memory interface and simplifies the data integrity management unit for the end user. An arbitration unit is implemented to allow concurrent processing of primary (user) and secondary (scrub) requests. The arbitration unit is location aware in context to the primary interface and is responsible for eliminating overlapping memory requests.

主权项

1. A memory system capable of concurrent system management comprising:
a core memory; primary interface logic coupled to the core memory; a secondary interface controller; an arbitration unit coupled to the primary interface logic, the secondary interface controller, and the core memory; a scratchpad memory coupled to the arbitration unit; a primary error detection and correction circuit coupled between the primary interface logic and the core memory; and a secondary error detection and correction circuit coupled between the secondary interface controller and the core memory.