发明名称 CHECK SYSTEM FOR MEMORY ADDRESS REGISTER
摘要 PURPOSE:To reduce the number of memory bits, by performing address check through the use of humming code, and by performing the program stop with the syndrome signal at error address occurrence. CONSTITUTION:The coded circuit ECD forms humming code from the write-in data and address, performs address check by utilizing the humming code, and generates the syndrome by decoding the humming code from the memory data and address through the decoding circuit DEC. Further, at the occurrence of address error, program stop or compulsive address jump is made with the syndrome signal. Thus, the write-in of parity bit is made unnecessary and the number of memory bit can be reduced.
申请公布号 JPS5466726(A) 申请公布日期 1979.05.29
申请号 JP19770133696 申请日期 1977.11.08
申请人 FUJITSU LTD 发明人 ITOU GINNO
分类号 G06F12/16;G11C29/00 主分类号 G06F12/16
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