EXTRACTING CLOCK RATE FROM DATA STREAM

摘要

A circuit for extracting a clock pulse waveform from an input pulse waveform comprising a phase-locked loop including a phase comparator having a first input to which the input pulse waveform is supplied, a second input and an output which is coupled in cascade at least with a voltage controlled oscillator whose output is coupled to the second input of the phase comparator. The clock pulse waveform is provided at the output of the oscillator. The phase comparator includes gating circuits controlled by the clock waveform and the input waveform to produce first and second intermediate pulse waveforms each having pulses constituted by different portions of the pulses of the input waveform and proportional to the pulse density of the input waveform, filter circuits connected directly to the gate circuits responsive to the first and second intermediate waveforms to produce first and second output waveforms which are equal to the mean amplitude values of the first and second intermediate waveforms and a subtractor circuit to produce a comparator output signal which is a function of the ratio of the first and second output waveforms and independent of the pulse density of the input waveform.