发明名称 MULTIIBAND SYNTHESIZER RECEIVER
摘要 PURPOSE:To secure the band switching through an easy operation and simple constituiton by memorizing the contents of the division ratio setting register in several memories according to the bands and then reading the contents selectively to supply it to the register. CONSTITUTION:PLL frequency synthesizer 13 uses variable frequency oscillator 8 as the local oscillator, and the division ratio of programable divider 9 of synthesizer 13 is controlled by division ratio setting register 14 in accordance with the reception frequency or the reception band. On the other hand, memory 20 memorizes the contents of register 14, and control circuit 17 performs the data transfer between register 14 and memory 20 as well as the selection control for memory 20. In such way, the contents of register 14 is memorized according to the bands into memory 20, and the contents is read out selectively to be supplied to register 14. Accordingly, the band switching is possible with an easy operation and simple constitution.
申请公布号 JPS5518163(A) 申请公布日期 1980.02.08
申请号 JP19780091267 申请日期 1978.07.26
申请人 SONY CORP 发明人 YASUDA HIROSHI;OSAKABE YOSHIO
分类号 H03J7/28;H03J5/00;H03J5/24;H04B1/26 主分类号 H03J7/28
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