发明名称 |
RECEIVER, WIRELESS COMMUNICATION SYSTEM, AND WIRELESS COMMUNICATION METHOD |
摘要 |
A receiver is provided with: a demodulator for using advance information to perform a wireless-signal demodulation process in which bit sequence rearrangement (first interleaving) is performed across blocks for performing symbol interleaving, and outputting first bit information; a de-interleaver for performing de-interleaving on the first bit information to return the sequence of the bits that were rearranged in the first interleaving to the original state, and outputting second bit information; a decoder for decoding the second bit information and outputting third bit information; and an interleaver for performing the first interleaving on the third bit information and outputting fourth bit information. The bit information of at least the preceding and following blocks, which are some of the blocks to be acquired as a result of an iterative decoding process, is used when the fourth bit information is inputted to the demodulator as the advance information and the iterative decoding process is performed. |
申请公布号 |
WO2016170832(A1) |
申请公布日期 |
2016.10.27 |
申请号 |
WO2016JP54847 |
申请日期 |
2016.02.19 |
申请人 |
HITACHI KOKUSAI ELECTRIC INC. |
发明人 |
YAMAMOTO Keisuke;YANO Takashi |
分类号 |
H03M13/27;H03M13/45;H04L1/00 |
主分类号 |
H03M13/27 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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