| 摘要 |
PURPOSE:To reduce the reduction in the level difference between the data lines at operation start and to quicken the operation speed, by applying the control signal in opposite phase in common with other end of the capacitors connected to each input and output terminal. CONSTITUTION:FF-type amplifier consisting of FET9 and 10 in which the drain and gate are in cross connection, switching FET7 and 8 provided between the input and output terminals N1, N2, and the data lines 1, 2, and receiving the control signal phiPG for the gate, driving FET11 provided between the common source and ground point of FET 9 and 10, and capacitor C receiving commonly the control signal in opposite phase to one end and connecting terminals N1, N2, to another end, are provided. As a result, the effect of control signal and opposite phase control signal is cancelled to the potential of the terminals N1 and N2, and the differential main amplifier 50 can be operated with faster speed. |
