| 摘要 |
PURPOSE:To make it possible to perform fault check simply, by providing a feedback shift register which applied respective outputs of the first to the (M-1)th flip flops to the second to the M-th exclusive OR circuits. CONSTITUTION:In the regular-structure programmable array integrated circuit, multiinput EXOR circuits 311...31M receive the first to the M-th sets of logic output lines respectively, and FF321...32M receive respective outputs of the first to the M-th EXOR circuits. Feedback shift register 3 is provided which applies the output of the (M+1)th EXOR circuit to left inputs of circuit 311, and applies respective outputs of the first to the (M-1)th FF to left inputs of the second to the M-th EXOR circuits. As a result, the signal sequence generated on respective logic output lines in parallel is accumulated in feedback shift register 3 and is converted to a series signal sequence and is taken out, so that fault check can be performed simply. |
