发明名称 MALFUNCTION PREVENTION UNIT OF CONTROL SYSTEM
摘要 <p>PURPOSE:To prevent surely the malfunction with a simple constitution at a power supply and break time, by providing an erroneous output prevention circuit to input a clear signal to the clear terminal of an output control circuit. CONSTITUTION:An erroneous output prevention circuit is so constituted that a time delay circuit consisting of resistance 11 and capacitor 12 and a reference voltage generating circuit consisting of Zener diode 15 may be connected to a power source bus and output voltage V1 and V2 of both circuits may be inputted to comparator 16. The output of comparator 16 is supplied to the clear terminal of the output control circuit of a CPU. By this constitution, a fixed time determined by the time delay circuit after power supply is held under the state of voltages V1<V2, and this state is held immediately after power break. Consequently, circuit 3 generates a clear signal in the fixed period after power supply and immediately after power break due to output 0 of comparator 16, and this clear signal is sent to the output control circuit to clear respective output circuits. Thus, the erroneous output is the unstable period accompanied with switching of the power source is prevented from being generated.</p>
申请公布号 JPS55123716(A) 申请公布日期 1980.09.24
申请号 JP19790030784 申请日期 1979.03.16
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 SHIYOUROJI KENJI;KURODA SATOSHI
分类号 H03K17/22;G06F1/00;G06F1/24;G06F1/26 主分类号 H03K17/22
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