发明名称 INPUT PROTECTING CIRCUIT FOR SEMICONDUCTOR DEVICE
摘要 PURPOSE:To obtain a circuit usable for MNOS and C-MOS elements by forming a region floated potentially additionally to a semiconductor substrate provided with source and drain regions as an input protecting circuit. CONSTITUTION:P<+> type source and drain regions 5 and 6 are diffused in an N type Si substrate 1 at ground potential, and a gate Si3N4 film 8 is coated through a gate SiO2 film 7 being extremely thin on the substrate 11 exposed therebetween. Subsequently, the regions 5 and 6 are spaced, and are provided with P type region 2 used as floating state without connecting to any potential point at the substrate 1, an N<+> type region 3 is provided therein, and a shallow N<-> type region 4 is diffused in the surface layer of the region 2 surrounding the region 3. Thus, a diode D1 is formed between the regions 3 and 4, and a diode D2 is formed between the egion 3 and the substrate 1, an SiO2 film 10 is covered on the entire surface as an input protective circuit, a window is opened, and an input voltage applying metal wire 9 is connected to the region 3.
申请公布号 JPS5681966(A) 申请公布日期 1981.07.04
申请号 JP19790159489 申请日期 1979.12.08
申请人 TOKYO SHIBAURA ELECTRIC CO 发明人 KAWANO TAKAHIDE;UCHIDA TAKETOSHI
分类号 H01L29/78;H01L27/02;H01L27/06 主分类号 H01L29/78
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