发明名称 MEAN VALUE OUTPUT TYPE A AND D CONVERTER
摘要 PURPOSE:To convert the mean value of the input signal into a digital quanity, by counting the time during which an integration is given to the input signal for an optional time and then discharging it with the reference voltage to secure the 0-level. CONSTITUTION:The input voltage Vi is charged to the capacitor C1 via the switch circuits 5 and 6, and the charged electric charge is put into the integrator 10 to deliver the voltage Vo. The comparator 11 delivers the signal ec=1 when receiving an application of the signal Vo. Then the control circuit 14 delivers the signal er=1 after the time T0 to switch the switching circuit 5; and at the same time delivers the signal eR=1 to apply it to the AND circuit 15 and then puts the clock pulse Pc into the counter 16. The electric charge that is charged to the capacitor C2 of the integrator 10 is transferred to the capacitor C1 to be discharged successively. When the electric charge is discharged completely, the output Vo turns to zero. Thus the output ec of the comparator 11 becomes 0, and the thus no clock pulse Pc is put into the counter 16 any more. Then the count value of the counter 16 becomes to a value that is proportional to the input voltage Vi.
申请公布号 JPS56122231(A) 申请公布日期 1981.09.25
申请号 JP19800024958 申请日期 1980.02.29
申请人 KOMATSU MFG CO LTD 发明人 YAMADA EISAKU
分类号 H03M1/52;(IPC1-7):03K13/20 主分类号 H03M1/52
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