发明名称 ACCESS ADDRESS CHECK PROCESSING SYSTEM FOR STORAGE DEVICE
摘要 PURPOSE:To execute the address conversion processing and the address check processing in one step, by executing both processings inthe same timing period. CONSTITUTION:The base address of an access area and an access address are stored in an address base register 3 and an access address register 5 respectively. The complementary value of the difference between the limit address and the base address is stored in an address length register 10. Contents of the register 5 are sent to an adder 6 and an operating part 11 and are added to the contents of registers 3 and 5 respectively. The addition value in the adder 6 is stored in the upper half of a system absolute address register 8, and the contents of the register 5 are stored in the lower half of the register 8. Thus, the contents of the register 8 are converted to a system absolute address. The access address is checked on a basis of presence or absence of the carry output generated as the operation result in the operating part 11.
申请公布号 JPS56157549(A) 申请公布日期 1981.12.04
申请号 JP19800061284 申请日期 1980.05.09
申请人 FUJITSU LTD 发明人 SHIMAMORI TAKESHI
分类号 G06F12/14;G06F12/10 主分类号 G06F12/14
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