| 摘要 |
PURPOSE:To optimize the condition for voltage stress, by providing the wiring for the power source-signal line in an IC in such a manner as to electrically separate by high and low of breakdown voltage required on a circuit. CONSTITUTION:A power source-signal line VDD(VSS) of capacity section of a memory cell and a peripheral circuit line VDD(VSS) are separated and connected to respectively different joining pads. It is possible, by doing so, to impress high voltage, when an IC is inspected in wafer condition, on the capacity section of the memory cell irrespective of a voltage VDD(VSS) of the peripheral circuit, and at the time of assembling, it is also possible to connect these two circuits by two pads. It is also favorable to provide independent pads for VDD(VSS) by peripheral circuits. It is possible, by doing so, to obtain an IC of good quality. |
