| 摘要 |
PURPOSE:To realize the discrimination of a defective chip memory, by applying an interruption according to the detection of parity error and storing the address of the memory chip to which an error is detected. CONSTITUTION:Both the data d and the corresponding parity P thereof are read out of storage parts 2 and 3 respectively in accordance with a chip address signal A1, a read signal R, and a chip selection signal M, etc. Then a parity check is carried out by the parity P obtained through an AND gate 5 to detect an error. When the output C of a parity detecting ciruit 4 is inverted to a high level, an interruption signal is produced from an NAND gate 6. Thus the signal A1 is stored in a register 11 and then shifted to a register 12 according to the clock. Furthermore the signal A1 is transferred and read via a driver 13 to carry out the assured discrimination between a defective chip memory and a normal chip memory. The only the defective chip is replaced with a normal one. |
