Digitally-controlled semiconductor circuit - has flip=flop with both outputs connected to one input of logic gate, whose output is coupled to extra input of flip=flop

摘要

The circuit comprises at least one bistable flip- flop. Both signal outputs (Q,Q1) of the flip-flop (G1, G2) are connected to an input of a logic gate (G3). The gate signal output is fed back to an additional signal input of the flip-flop, possibly using additional switching elements. Pref. the logic gate is so designed as to respond to the mestable operating condition of the flip- flop. The outputs of the bistable flip-flop may be formed by outputs of a pair of cross-coupled NOR-gates, while the feedback operating logic gate may be of the AND-type. Alternatively, the outputs are formed by cross-coupled NAND-gages, while the feedback gate may be of the OR-type. The output of the logic gage may be connected to the additional signal input of the flip-flop via an amplifier circuit in the form of a push-pull stage.