发明名称 MEMORY SWITCH CONTROL SYSTEM OF SAME SPEED IN SMALL BUNDLE
摘要 PURPOSE:To achieve exchange for lines with different speeds, by splitting a prescribed constant speed zone into a plurality of small bundles through the frame synchronism corresponding to the prescribed speed, and making switch control in the unit of constant speed in the small bundles. CONSTITUTION:A signal from lines in 3.2k, 12.8k, 64k-bit with different speed is sequentially multiplexd at multiplexers 1-2, 1-1, and 1 respectively and written in a data buffer 2. The switch control in a data buffer 2 is made with the 1st frame synchronous, memory 14 in 256-word, 2nd frame synchronous memory 16 in 256X5-word, and address control memory 17, corresponding to the small bundle. That is, the memory switch operation taking a small bundle signal from the 12.8k-bit line as a unit is made in the data buffer 2, and the output is distributed with a demultiplexer 3. The utilizing efficiency of transmission lines can be increased by this invension.
申请公布号 JPS5799095(A) 申请公布日期 1982.06.19
申请号 JP19800174698 申请日期 1980.12.12
申请人 FUJITSU KK;NIPPON DENSHIN DENWA KOSHA 发明人 NOMURA TETSUHIRO;SATOU HIROAKI;ARITA TAKEMI;MIYAYASU KENJI
分类号 H04Q3/52;H04Q11/04 主分类号 H04Q3/52
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