发明名称 NON-VOLATILE SEMICONDUCTOR MEMORY UNIT
摘要 PURPOSE:To obtain higher integration density in smaller size memories by making memory status of ''1'' or ''0'' correspond to either existence or absence of depletion layers produced under the channel region with only one impurity diffusion layer provided in each memory cell. CONSTITUTION:A p type silicon substrate 1 is divided by a channel stoppers 1' and field oxide layers 2, and an n<+> layer 3 is formed on the substrate. An insulating layer 5, the floating gate 6, an insulating layer 7 and the control gate 8 are laminated on the channel 4. Under this construction, when electrons exist in the floating gate 6, a small depletion layer 9 exists in the channel 4, but no electrons exist, a larger depletion layer 9' exists in the channel. The depletion layer grows when positive voltage is applied to word terminal W, so that electrons flow from n<+> layer 3 to the depletion layer toward the direction X as indicated by the arrow. Memory status of either ''1'' or ''0'' can be read out by detecting this current. Values of the current is determined by a total of thicknesses of the insulating layers 5, 6 and area of the channel 4.
申请公布号 JPS57107076(A) 申请公布日期 1982.07.03
申请号 JP19800182745 申请日期 1980.12.25
申请人 FUJITSU KK 发明人 TAKEI AKIRA;HIGA YOSHIHIKO;MITSUIDA TAKASHI
分类号 H01L27/112;G11C14/00;H01L21/8239;H01L21/8246;H01L21/8247;H01L27/10;H01L29/788;H01L29/792;H01L29/861 主分类号 H01L27/112
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