| 摘要 |
PURPOSE:To make a normal data demodulation possible against the step-out of synchronization of a VFO circuit, by adding a data signal inverting circuit and adding a data buffer in the succeeding stage of this circuit. CONSTITUTION:A signal (a) from a medium is supplied to a VFO circuit 22 to generate a data signal (c) and a window signal (d). Signals (c) and (d) are supplied to a demodulating circuit 23, and a signal (-c) passing through an inverting circuit 30 and the signal (d) are supplied to a demodulating circuit 33. A demodulation signal e1 is given to buffers 24-1 and 24-2 and a synchronizing signal detector 25 to obtain data outputs f1 and f2 and a synchronization indicating output g1. A demodulation signal e2 is given to buffers 34-1 and 34-2 and the synchronizing signal detector 25 to obtain data output f3 and f4 and a synchronization indicating output g2. Outputs f1-f4 are selected in accordance with signals g1 and g2 in a selecting circuit 17, and one output is outputted as a data signal (h). |
