| 摘要 |
PURPOSE:To decrease the time which is required for the second lead-in when the self-traveling mode is switched to the synchronizing mode, by storing the filter variable value in the synchronizing mode in case the switching is carried out between the synchronizing mode and the self-traveling mode in accordance with the accuracy of the input clock signal. CONSTITUTION:When a highly precise clock signal is applied to a terminal 10, the clock signal is divided and then converted into a phase difference signal. Then the low frequency component is extracted by the function of a digital filter 5. An oscillator 7 is controlled by the low frequency component. The variable value of the filter 5 of that moment is stored in a memory 8. If the accuracy of the clock signal lowers, a control arithmetic circuit 9 works to make the oscillator 7 self-travel with the frequency obtained before the accuracy of the clock signal lowers. After this, the synchronizing mode is secured again when the accuracy of the clock signal is recovered. In this case, the variable value stored in the memory 8 is applied to the filter 5 to accelerate the lead-in. |
