Top metal pads as local interconnectors of vertical transistors

摘要

An integrated circuit structure includes a first vertical transistor and a second vertical transistor. The first vertical transistor includes a first semiconductor channel, a first top source/drain region over the first semiconductor channel, and a first top source/drain pad overlapping the first top source/drain region. The second vertical transistor includes a second semiconductor channel, a second top source/drain region over the second semiconductor channel, and a second top source/drain pad overlapping the second top source/drain region. A local interconnector interconnects the first top source/drain pad and the second top source/drain pad. The first top source/drain pad, the second top source/drain pad, and the local interconnector are portions of a continuous region, with no distinguishable interfaces between the first top source/drain pad, the second top source/drain pad, and the local interconnector.

主权项

1. An method comprising:
forming a first vertical transistor comprising:
a first semiconductor channel;a first top source/drain region over the first semiconductor channel; forming a second vertical transistor comprising:
a second semiconductor channel; anda second top source/drain region over the second semiconductor channel; forming a conductive layer covering both the first vertical transistor and the second vertical transistor; and etching the conductive layer, wherein remaining portions of the conductive layer comprises:
a first top source/drain pad overlapping and electrically coupled to the first top source/drain region;a second top source/drain pad overlapping and electrically coupled to the second top source/drain region; anda local interconnector interconnecting the first top source/drain pad and the second top source/drain pad.