发明名称 MEMORY ACCESS CONTROLLER
摘要 PURPOSE:To sharply reduce the accessing time, by simultaneously accessing plural memory chips at the time of writing, and accessing the memory after returning to the conventional memory space at the time of writing and readout of a specified pattern. CONSTITUTION:When a memory access signal and a memory write signal are inputted into a 3AND under condition where a flip flop FF is set, all of outputs of 16 pieces of off circuits OR1-OR16 become ''1'' and all memories are selected. Then, a fixed pattern is set to the 1st register R1 and the same fixed pattern is set to a data register Rd from the register R1. When the writing operation is executed by setting the 16383 to an address register Ra and delivering the memory access signal and memory write signal from a memory controller, the writing operation is executed on all memories of the memory.
申请公布号 JPS57205897(A) 申请公布日期 1982.12.17
申请号 JP19810088840 申请日期 1981.06.11
申请人 OKI DENKI KOGYO KK 发明人 KITOU TERUKAZU
分类号 G11C29/00;G06F11/22;G06F12/06;G11C29/28;G11C29/34 主分类号 G11C29/00
代理机构 代理人
主权项
地址