发明名称 |
RF SOI switch with backside cavity and the method to form it |
摘要 |
An integrated circuit includes a compound semiconductor substrate having a first semiconductor substrate, an insulating layer on the first semiconductor substrate, and a second semiconductor substrate on the insulating layer, a transistor disposed on the second semiconductor substrate and having a bottom insulated by the insulating layer, a plurality of shallow trench isolations disposed on opposite sides of the transistor, a cavity disposed below the bottom of the transistor, and a plurality of isolation plugs disposed on opposite sides of the cavity. By having a cavity located below the transistor, parasitic couplings between the transistor and the substrate are reduced and the performance of the integrated circuit is improved. |
申请公布号 |
US9466573(B2) |
申请公布日期 |
2016.10.11 |
申请号 |
US201615018763 |
申请日期 |
2016.02.08 |
申请人 |
Semiconductor Manufacturing International (Shanghai) Corporation |
发明人 |
Huang Herb He;Hong Zhongshan |
分类号 |
H01L21/3105;H01L23/552;H01L29/04;H01L29/06;H01L29/78;H01L29/66;H01L23/66 |
主分类号 |
H01L21/3105 |
代理机构 |
Kilpatrick Townsend & Stockton, LLP |
代理人 |
Kilpatrick Townsend & Stockton, LLP |
主权项 |
1. A method of manufacturing an integrated circuit, the method comprising:
providing a compound semiconductor substrate having a first semiconductor substrate, an insulating layer on the first semiconductor substrate, and a second semiconductor substrate on the insulating layer; forming a protective layer on the second semiconductor substrate; forming a plurality of shallow trench isolations through the protective layer and the second semiconductor substrate; forming a plurality of via holes through the shallow trench isolations and the insulating layer, the via holes extending into a portion of the first semiconductor substrate; selectively removing a portion of the first semiconductor substrate disposed between the via holes to form a continuous cavity area; filling the via holes with a dielectric material and performing a chemical mechanical polishing process to remove excess of the dielectric material to form a plurality of isolation plugs dividing the continuous cavity area into a plurality of separate cavities; removing a portion of the shallow trench isolations and a portion of the isolation plugs higher than the second semiconductor substrate and the protective layer; and forming a transistor within a portion of the second semiconductor substrate disposed between two adjacent shallow trench isolations. |
地址 |
Shanghai CN |