Stacked bit line dual word line nonvolatile memory

摘要

An arrangement of nonvolatile memory devices, having at least one memory device level stacked level by level above a semiconductor substrate, each memory level comprising an oxide layer substantially disposed above a semiconductor substrate, a plurality of word lines substantially disposed above the oxide layer; a plurality of bit lines substantially disposed above the oxide layer; a plurality of via plugs substantially in electrical contact with the word lines and, an anti-fuse dielectric material substantially disposed on side walls beside the bit lines and substantially in contact with the plurality of bit lines side wall anti-fuse dielectrics.

主权项

1. A memory device, comprising:
a substrate; a first conductive element; a first conductive line over the substrate and coupled to the first conductive element, the first conductive line orthogonal to the first conductive element; second and third conductive elements orthogonal to the first conductive element; a first memory cell between the second and first conductive elements on a sidewall beside the first conductive element; a second memory cell between the third and first conductive elements on the sidewall beside the first conductive element, wherein the first memory cell is over the second memory cell, and the sidewall extends from the first memory cell to the second memory cell; and a second conductive line parallel to the first conductive line, and a fourth conductive element orthogonal to and coupled to the second conductive line through a conductive pad.