发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT
摘要 <p>PURPOSE:To improve the yield through the minimized number of transistors (TRs) of a memory section, by providing a selection gate section which selects whether the output of the memory section is outputted or inverted, between the memory section of a mask programmable ROM and a peripheral circuit. CONSTITUTION:Outputs D'0-D'N-1 of a memory section 11 are inputted to a selection gate circuit 12 and outputs D0-DN-1 of the selection gate circuit are inputted to a peripheral circuit 13. The selection gate circuit is a circuit which selects whether an input signal is outputted as it is or inverted by means of a mask or a control signal. The relation between the presence/adsence of TRs in the memory section 11 and logics ''1'', ''0'' is selected to attain minimized number of the TRs. Thus, the number of the TRs in the memory section is reduced, the yield is improved and the access time is shortened.</p>
申请公布号 JPS5894194(A) 申请公布日期 1983.06.04
申请号 JP19810192221 申请日期 1981.11.30
申请人 TOKYO SHIBAURA DENKI KK 发明人 MOBARA HIROSHI;TANAKA NORISHIGE
分类号 G11C17/00;G11C7/00 主分类号 G11C17/00
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