| 摘要 |
<p>PURPOSE:To decrease the quantity of hardwares, by decentralizing all procedures for transmission of data and at the same time by simplifying the access method to a common data memory. CONSTITUTION:The non-paket terminals are connected to a data memory 60 via circuits 11-1n, circuit control parts 21-2n, transmission control processors 31-3n and a memory bus 70 respectively. At the same time, a packet exchange station is connected to the memory 60 via a multiplex circuit control part 40 and a transmission control processor 30. Thus the communication is performed between the exchange station and the terminals via the memory 60. The processor 30 transmits and receives data between the memory 60 and the part 40 on the basis of the transmission control procedure corresponding to the exchange station, while the control part 40 controls the assembly and disassembly of a data packet. The processors 31-3n transmit data between the control part 21- 2n and the memory 60 with the transmission control procedure corresponding to the non-packet terminals. A memory access control part 80 controls the access sequences to the memory 60 for the processors 30-3n.</p> |
