| 摘要 |
PURPOSE:To obtain a level converting input circuit with high speed and low power consumption, by impressing a voltage to a gate of an N type MOSFET of an input circuit where P and N type MOSFETs are connected in series so as to control a logical threshold voltage of the input circuit. CONSTITUTION:An ECL compatible CMOS input circuit 8 consists of a series circuit comprising P/N type MOSFETs P11, N11, and a resistor R1, a signal of the ECL level is inputted to a gate of the P11 and a signal of CMOS level is outputted from a connecting point of the P11, N11. When the input of the circuit 8 is a reference voltage Vbb determining the logical threshold voltage of the ECL circuit, a voltage VCON forming a CMOS output as the logical threshold voltage is impressed to a gate of the N11 from a VCON voltage generating circuit 7. When an input stage output 4 of the circuit 8 is higher than a reference voltage 5 of the differential amplifier stage, the potential of the VCON is increased and the resistance value of the N-MOSFETN12 is decreased to lower the potential of the output 4, and when the output 4 is lower than the voltage 5 inversely, the circuit operates so as to increase the potential at the output 4, allowing to control the VCON to be constant against the environmental change. |
