发明名称 COLOR VIDEO SIGNAL ANALOG-TO-DIGITAL CONVERTING CIRCUIT
摘要 <p>1. A circuit arrangement in which an incoming analog colour video signal composed of a luminance signal and a chrominance subcarrier (chrominance signal) which is modulated by colour signals (colour difference signals) is converted into a digital luminance signal and two digital colour signals, the colour video signal being applied to an analog-to-digital converter which operates at a clock rate which corresponds to approximately a multiple of the line frequency, the digitized chrominance signal being demodulated and two digital colour signals being obtained, characterized in that the luminance signal part of the colour video signal is applied to a first analog-to-digital converter (3) which operates at a clock rate corresponding to a multiple of the line frequency of the incoming signal and that the luminance signal thus digitized is applied to a first output terminal (22), possibly through a low-pass filter (21), and that the colour video signal (1) is applied through a filter (25) which passes the chrominance signal for example through a band-pass or a high-pass filter, to a second analog-to-digital converter (27) which operates at a clock rate corresponding to a multiple of the chrominance subcarrier frequency (FO ), and that the digitized chrominance signal (in 37) is demodulated and that the two digital colour signals, thus obtained, are each applied (from 41 or 42) to a first or a second write-read store (43 or 44) whose write section (45 or 46) operates in accordance with a clock rate corresponding to the chrominance subcarrier frequency or a multiple thereof, and that the read section (47 or 48) of each write-read store operates at a clock rate which is derived from a multiple of the line frequency of the incoming colour video signal, but which is corrected such _v_i_a an address control stage (60) that in the output signal the colour signal values written-in in accordance with the write clock of the writing stage (45 or 46) are distributed over the overall read line-length also when the line frequency deviates from the standard value.</p>
申请公布号 JPS5961290(A) 申请公布日期 1984.04.07
申请号 JP19830158133 申请日期 1983.08.31
申请人 PHILIPS' GLOEILAMPENFABRIEKEN NV 发明人 EKUARUTO PEHI
分类号 H04N11/04;H04N9/64;H04N9/79 主分类号 H04N11/04
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