| 摘要 |
PURPOSE:To reduce the operating processing time for sequence instruction by performing a part of the operating processing performed conventionally by a microprocessor by means of the hardware at the outside of an operating section. CONSTITUTION:Plural addressings are performed for a readout signal of an input/output device 3, and when each address is accessed, a data to be written in the microprocessor 1 is taken as a logical data between an output data 17 of the input/output device 3, an inverting data 25 and an output data 12 of a shift register 4. Thus, the load of the operating processing performed by the microprocessor 1 is releaved, allowing to speed up the operating processing time. |
