| 摘要 |
PURPOSE:To prevent the erroneous access, by allowing a microprocessor unit to manage independently protect information concerning permission or inhibition of the common bus access and allowing the microprocessor unit to perform the access management including kinds of processings and operation modes also. CONSTITUTION:A microprocessor processing and operation mode discriminating circuit 3 refers to the status signal of a microprocessor 2 to discriminate the processing and the operation mode. Four kinds of signal for fetch of operating, its data access, fetch of a user program, and its data access are provided (the destination to be accessed is discriminated by the address output of the microprocessor and is reported to a common bus access control circuit 5). A protect discriminating circuit 7 discriminates whether the write operation is permitted or not on a basis of set protect information. When the circuit 5 judges that there are no valid common bus access requests on a basis of four kinds of signal and a protect signal, the circuit 5 does not output a request signal to a common bus use right acquiring circuit 8. |
