| 摘要 |
PURPOSE:To process a condition branching instruction and an instruction which inverted the condition by a common microprogram by generating an enable signal when the address designation is applied to a program counter then inverting the carry signal in accordance with the enable signal and the condition inverting bit of an instruction register. CONSTITUTION:When a condition branching instruction is fetched to an instruction register 1, the output signal G of an NOR gate 14 is fixed at 0 regardless of the state of an enable signal N since the condition inverting signal B is set at 1. Then a carry signal C0 given from a connecting circuit 11 passes at it is through an EXOR gate 15 and is supplied to an operator 10d in the form of a carry signal Cn. When the condition branching instruction is fetched, the signal G is set at 0 since the signal B is 0 in the same way as mentioned above. Then the signal EN is set at 0 when program counters 9a receive the address designation by a microinstruction IA. While the signal C0 is inverted and supplied to the operator, and the condition branching instruction is executed. |
