发明名称 DECODER CIRCUIT
摘要 PURPOSE:To attain high speed and low power consumption by constituting that a current flows only to a circuit selected in each row or column of a transistor (TR) matrix to reduce the number of circuits to which the current flows into a number raised to half of the conventional number and increase the current value flowing to one circuit by the share. CONSTITUTION:Since a voltage of 1.2V is impressed between a base of a pnp TR37 of a selected row and a power supply terminal VE, the TR37 is turned on in this case and a current flows. This current flows via a TR (TRs connected to the selected column) having the lowest base voltage in pnp TRs 38 connected to the collector of an OFF-TR37. That is, the current flows to the pnp TR37 at the selected row and a pnp TR38 at the cross point between the selected row and column only, and only the collector voltage of the selected TR38 becomes a high level by the voltage drop's share of a resistor Rc.
申请公布号 JPS59135692(A) 申请公布日期 1984.08.03
申请号 JP19830008718 申请日期 1983.01.24
申请人 HITACHI SEISAKUSHO KK 发明人 NANBU HIROAKI;HONMA NORIYUKI;INADATE MASAAKI
分类号 G11C11/413;G11C11/34 主分类号 G11C11/413
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