| 摘要 |
PURPOSE:To atain efficient and high speed reorganization of a dataway attended with the generation of an error and the expansion of a system by allowing two objective stations to perform the switching control of loopback form at an identical message. CONSTITUTION:A station 1 supervising a line sets a loopback command data by a common address designation to a transmission data buffer 30 and the data is transmitted onto a high speed input/output bus 33 under the control of a transmission command circuit 31 following the transmission command of a microprocessor 10. Further, the data is converted in paralle-serial form by an input/output control circuit 21 and transmitted to lines LA and LB so as to be transmitted to a station 21 not supervising the line in the loop, thereby causing the loop switching connection in the form of loopback from the line LA to the LB to be formed. Thus, the two objective stations are designated by the loopback command data of a common address command transmitted from the station 1 and switched into the loopback form at the same time, allowing the switching connection of optional station to be attained in high speed.
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